Remove panelized PCB, convert to kicad 6

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redfast00 2022-02-01 13:00:29 +01:00
parent 438213ea59
commit 07e95f836e
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9 changed files with 356 additions and 3594 deletions

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@ -26,12 +26,6 @@ By default, the INT pin on the CAN module is not connected to the Arduino in ord
save pins. If you want to connect the INT pin to pin D2 on the Arduino, you can bridge save pins. If you want to connect the INT pin to pin D2 on the Arduino, you can bridge
the jumper on the top right of the board with some solder. the jumper on the top right of the board with some solder.
## Getting this board manufactured
I order to get this board manufactured cheaper, we panelized it (by putting two OBUS PCBs per ordered "board"). If you want to manufacture this board, there's a file `panel/can_arduino_mini_pcb_panel/fabricate/handin.zip` containing all the
Gerber files needed for production. If you modify the original PCB, you can generate
the panel with `panel/build.sh`, then use KiCAD to plot the Gerber files.
### Component list per board ### Component list per board
- 2 1x15 2.54mm pin sockets, we recommend 4 sockets so you can socket the Arduino as well - 2 1x15 2.54mm pin sockets, we recommend 4 sockets so you can socket the Arduino as well
@ -47,4 +41,3 @@ There is still some space left over at the top and sides of the board, so use it
- Add extra connection holes for every Arduino pin where wires can be soldered semi permanently on the sides of the board - Add extra connection holes for every Arduino pin where wires can be soldered semi permanently on the sides of the board
- Add copper pads/holes to make a "perfboard" on the bottom of the board (with 2.54mm spacing, like a breadboard) - Add copper pads/holes to make a "perfboard" on the bottom of the board (with 2.54mm spacing, like a breadboard)
- Add holes to solder wires in for the status RGB LED in case we don't want this on the main PCB - Add holes to solder wires in for the status RGB LED in case we don't want this on the main PCB

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@ -15,6 +15,7 @@ _autosave-*
*-save.pro *-save.pro
*-save.kicad_pcb *-save.kicad_pcb
fp-info-cache fp-info-cache
*-backups
# Netlist files (exported from Eeschema) # Netlist files (exported from Eeschema)
*.net *.net

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@ -0,0 +1,355 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.05,
"copper_line_width": 0.2,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": true,
"courtyard_line_width": 0.05,
"other_line_width": 0.15,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": true,
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": true
},
"diff_pair_dimensions": [
{
"gap": 0.25,
"via_gap": 0.25,
"width": 0.2
}
],
"drc_exclusions": [],
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.09999999999999999,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.2,
"min_via_diameter": 0.4,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_paste_clearance": 0.0,
"solder_paste_margin_ratio": -0.0
},
"track_widths": [
0.25
],
"via_dimensions": [
{
"diameter": 0.8,
"drill": 0.4
}
]
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
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],
[
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[
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[
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],
[
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[
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],
[
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[
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[
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[
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[
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],
[
2,
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2,
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]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "can_arduino_mini_pcb.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "can_arduino_mini_pcb.net",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "Pcbnew",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [],
"text_variables": {}
}

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@ -1,2 +0,0 @@
#!/bin/sh
kikit panelize grid --space 3 --gridsize 1 2 --tabwidth 5 --tabheight 10 --htabs 1 --vtabs 1 --mousebites 0.5 1 0.25 --radius 1 ../can_arduino_mini_pcb/can_arduino_mini_pcb.kicad_pcb can_arduino_mini_pcb_panel/can_arduino_mini_pcb_panel.kicad_pcb

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@ -1,28 +0,0 @@
# For PCBs designed using KiCad: http://www.kicad-pcb.org/
# Format documentation: http://kicad-pcb.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*.kicad_prl
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv

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@ -1,33 +0,0 @@
update=22/05/2015 07:44:53
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]

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@ -1,4 +0,0 @@
EESchema Schematic File Version 2
EELAYER 25 0
EELAYER END
$EndSCHEMATC