64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
#ifndef INLINE_ASM_C
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#define INLINE_ASM_C
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#include <stdint.h>
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#include "memory.c"
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typedef struct {
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uint16_t limit;
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uint32_t base;
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}__attribute__((packed)) gdt_desc;
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typedef struct {
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uint16_t limit_lower;
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uint16_t base_lower;
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uint8_t base_middle;
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uint8_t access_byte;
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uint8_t flags_limit_higher;
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uint8_t base_higher;
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}__attribute__((packed)) gdt_entry;
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static inline void outb(uint16_t port, uint8_t val) {
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asm volatile ( "outb %0, %1" : : "a"(val), "Nd"(port) );
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}
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static inline uint8_t inb(uint16_t port) {
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uint8_t ret;
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asm volatile ( "inb %1, %0"
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: "=a"(ret)
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: "Nd"(port) );
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return ret;
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}
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static inline void lidt(void* base, uint16_t size)
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{ // This function works in 32 and 64bit mode
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struct {
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uint16_t length;
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void* base;
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} __attribute__((packed)) IDTR = { size, base };
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asm ( "lidt %0" : : "m"(IDTR) ); // let the compiler choose an addressing mode
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}
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/** issue a single request to CPUID. Fits 'intel features', for instance
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* note that even if only "eax" and "edx" are of interest, other registers
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* will be modified by the operation, so we need to tell the compiler about it.
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*/
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static inline void cpuid(int code, uint32_t *a, uint32_t *d) {
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asm volatile("cpuid":"=a"(*a),"=d"(*d):"a"(code):"ecx","ebx");
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}
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/** issue a complete request, storing general registers output as a string
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*/
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static inline int cpuid_string(int code, uint32_t where[4]) {
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asm volatile("cpuid":"=a"(*where),"=b"(*(where+1)),
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"=c"(*(where+2)),"=d"(*(where+3)):"a"(code));
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return (int)where[0];
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}
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static inline void sgdt(gdt_desc* ret) {
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asm volatile ("sgdt %0" : : "m"(*ret) : "memory");
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}
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#endif //INLINE ASM_C
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